A new chipset for generating computer-generated hologram

Journal of Lasers, Optics & Photonics

ISSN: 2469-410X

Open Access

A new chipset for generating computer-generated hologram

5th International Conference and Exhibition on Lasers, Optics & Photonics

November 28-30, 2016 Atlanta, USA

Young-Ho Seo, Yoon-Hyuk Lee and Dong-Wook Kim

Kwangwoon University, South Korea

Posters & Accepted Abstracts: J Laser Opt Photonics

Abstract :

Computer-generated holography is a method of digitally generating interference fringe patterns. Recently, the term of â??computergenerated holographyâ? has been used to present the whole process of preparing holographic light wavefronts suitable for various displaying. The resultant images generated by the computer-generated holography are called computer-generated hologram (CGH). In case of generating synthetic holograms, the CGHs have the advantage that the objects donâ??t need to possess any physical reality at all. In case of optically generating a hologram from existing objects, if it is digitally recorded and processed or displayed, this is corresponding to the CGH as well. Wavefront calculations for the CGHs are computationally very intensive. Although the researchers use modern mathematical techniques and high-performance computing equipment, real-time operation is very difficult according to the amount of the object points. There are many various methods for calculating the interference pattern for a CGH. Among them, we use the point source method. In this paper, we propose a new hardware architecture to generate CGHs based on the block based calculation method and implement a VLSI (very large scaled integrated circuit) in ASIC (application specific integrated circuit) environment. The proposed hardware has a structure that can produce a part of a hologram in the unit of a 12x12 block in parallel. After calculating a block of a hologram by using an object point, the calculation is repeated to all object points and intermediate results from them are accumulated to produce a final block of a hologram. Through this structure, we can make various sizes of holograms with the optimized memory access in real-time operation. The proposed hardware was implemented in the Hynix 0.18 um CMOS technology of MagnaChip Inc., and has 876,608 gate counts. It can generate complex holograms unlike the previous researches and stably operate in the clock frequency of 200 MHz.

Biography :

Young-Ho Seo has received his MS and PhD degrees in 2000 and 2004, respectively from Department of Electronic Materials Engineering of Kwangwoon University in Seoul, Korea. He was a Researcher at Korea Electrotechnology Research Institute (KERI) in 2003 to 2004. He was a Research Professor of Department of Electronic and Information Engineering at Yuhan College in Buchon, Korea. He was an Assistant Professor of Department of Information and Communication Engineering at Hansung University in Seoul, Korea. He is a Full Professor of Ingenium College of Liberal Arts at Kwangwoon University in Seoul, Korea and a Director of Research Institute in DSI Tech Inc. Hi is now a Visiting Professor in University of Nebraska at Omaha, NE, USA. His research interests include realistic media, digital holography, SoC design and bus architecture.


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